The present invention relates to semiconductor manufacture and, more specifically, to a method of integrating channel silicon germanium (SiGe) films in CMOS technology to improve CMOS device manufacture.
During semiconductor device manufacture, nucleation of one deposited material can occur at a different point than another, and different materials often exhibit different film growth rates over a given period of time. Interaction with dopants contributes to nucleation delay, different growth rates, and other effects, so that masks are used to cover one device region while material is deposited on another. The masks in some instances are then removed and material is deposited on other regions of the device, sometimes using additional masks. As a result of the presence of a mask during deposition, edge effects are typically observed in components formed from the deposited material. For example, in the manufacture of field effect transistors (FETs) employing layers or films of SiGe, epitaxial deposition of silicon germanium is delayed over NFET P well implant regions as compared to PFET N well implant regions. As a result, a hard mask of silicon nitride or silicon oxide is used to cover the NFET region during SiGe deposition on the PFET region, which results in edge effects in the deposited SiGe.
It may therefore be advantageous to deposit SiGe without the edge effects that result from the use of masks. Additionally, it may be advantageous to use the delay in nucleation induced by dopants in the manufacture of semiconductor devices as opposed to finding ways to overcome the delay.